Turning to FIG. 1, an example of a conventional radio frequency (RF) transmitter 200 can be seen. As shown in this example, RF circuitry is included on an integrated circuit (IC) 102 that uses a transformer combiner to generate the desired power. The scheme employed by the IC 102 is a polar modulation scheme, which uses a polar modulator 108 to decompose in-phase (I) and quadrature (Q) signals into amplitude and phase. The phase information is provided to the power amplifiers 112-1 to 112-4 (PAs), which are digital PAs, and the amplitude information is provided to the power controller 110, which controls the power output of each of PAs 112-1 to 112-4. Since each of the PAs 112-1 to 112-4 receive the same signal and the respective outputs are applied to primary windings 116-1 to 116-4 of transformer 114, the power from each “branch” can be added together by secondary winding 108 to generate an output signal for IC 102. Depending on the amount of deliverable power desired, the number of PAs 112-1 to 112-4 can be increased or decreased.
One issue with this transmitter 100 is that there is no filter response introduced that allows for any analog filtering. The usual reason is that phase modulation is very sensitive, and introduction of predistortion to induce a filter response would create a mismatch between the power controller 110 and the PAs 112-1 to 112-4. As a result, an off-chip band-pass filter 104 is provided between the IC 102 and load 106 (which may be an antenna and matching circuitry). Other conventional RF transmitter also have similar drawbacks. For example, quadrature modulators usually includes an off-chip PA, and Linear Amplification with Nonlinear Components (LINC) transmitters usually include off-chip Wilkinson combiners and band-pass filters. Thus, there is a need for an improved RF transmitter.
Some example of other conventional systems are: Haldi et al., “A 5.8 GHz 1 V Linear Power Amplifier Using a Novel On-Chip Transformer Power Combiner in Standard 90 nm CMOS,” IEEE J. of Solid-State Circuits, Vol. 43, No. 5, May 2008, pp. 1054-1063; Lai et al., “A 1V 17.9 dBm 60 GHz Power Amplifier in Standard 65 nm CMOS,” 2010 IEEE Intl. Solid-State Circuits Conf. (ISSCC), Feb. 10, 2010, pp. 424-425; Chang et al., “A 77 GHz Power Amplifier Using Transformer-Based Power Combiner in 90 nm CMOS,” 2010 IEEE Custom Integrated Circuits Conf. (CICC), Sep. 19-22, 2010, pp. 1-4; Kim et al., “A Linear Multi-Mode CMOS Power Amplifier With Discrete Resizing and Concurrent Power Combining Structure,” IEEE J. of Solid-State Circuits, Vol. 46, No. 5, May 2011; and U.S. Pat. No. 7,777,570.